High voltage half-bridge switching circuits are used in various applications such as motor drives, electronic ballasts for fluorescent lamps and power supplies. The half-bridge circuits employ a pair of totem pole connected switching elements (e.g., transistors, IGBTs, and/or FET devices) that are placed across a DC high voltage power supply. For example, referring to FIG. 1, there is seen a conventional half-bridge switching circuit 100 as known in the prior art. Half-bridge circuit switching 100 includes transistors 105a, 105b connected to one another at load node “A” in a totem pole configuration, DC voltage source 110 electrically connected to the drain of transistor 105a and the source of transistor 105b, gate drive buffers DRV1, DRV2 electrically connected to the gates of transistors 105a, 105b, respectively, to supply appropriate control signals to turn on and off transistors 105a, 105b, and DC voltage supplies DC1, DC2 for providing electrical power to FET devices 105a, 105b, respectively. DC voltage supplies DC1, DC2 are generally lower in voltage that DC voltage source 110, since the gate drive voltage levels needed to properly drive transistors 105a, 105b are generally much lower than that supplied by DC voltage source 110. As shown in FIG. 1, the lower transistor 105b, DC voltage supply DC2, DC voltage source 110, and DRV2 all share a common node “B,” and upper transistor 105a, DC voltage supply DC1, and DRV1 share common load node “A.”
In operation, transistors 105a, 105b are diametrically controlled, so that transistors 105a, 105b are never turned on at the same time. That is, transistor 105b remains off when transistor 105a is turned on, and vice versa. In this manner, the voltage of load node “A” (i.e., the output node connected to the load) is not fixed, but rather assumes either the voltage level of DC voltage source 110 or zero volts, depending on which of transistors 105a, 105b is turned on at a given instant.
DC voltage supply DC2 may be derived relatively easily, for example, by tapping an appropriate voltage level (e.g., by using a voltage divider) from DC voltage source 110, since voltage supply DC2 and DC voltage source 110 share a common node. However, a “bootstrap” technique is required to derive DC voltage supply DC1, since voltage supply DC1 needs to be floating with respect to DC voltage source 110. For this purpose, voltage supply DC1 is derived from DC voltage supply DC2, for example, by connecting a high voltage diode DBS between DC voltage supplies DC1, DC2, as shown in FIG. 2. A capacitor CBS serves as voltage supply DC1 used to power driver DRV1.
When transistor 105b is turned on, load node “A” is effectively connected to zero volts, and diode DBS allows current to flow from power supply DC2 to capacitor CBS, thereby charging capacitor CBS to approximately the voltage level of DC power supply DC2. When transistor FET 105b is turned off and transistor 105a is turned on, the voltage at load node “A” will assume approximately the voltage level of DC voltage source 110, which causes diode DBS to become reverse biased, with no current flowing from DC2 to capacitor CBS. While diode DBS remains reverse biased, the charge stored in capacitor CBS supplies buffer DRV1 with voltage. However, capacitor CBS will supply voltage to DRV1 for only a finite amount time, and thus transistor M1 needs to be turned off and transistor 105b turned on to replenish the charge stored in capacitor CBS.
In many of today's half-bridge driver circuits, the bootstrap capacitor and the bootstrap diode DBS via are formed from discrete components provided off-chip, since the required capacitance of the bootstrap capacitor and the breakdown voltage and peak current capacity required of the bootstrap diode are too large to be produced on chip.
U.S. Pat. No. 5,502,632 to Warmerdam (hereinafter “the '632 reference”) relates to a high voltage integrated circuit driver employing a bootstrap diode emulator. The emulator includes an LDMOS transistor that is controlled to charge the bootstrap capacitor only when he low-side driver circuit is driven. The LDMOS transistor is operated in a source follower configuration with its source electrode connected the low-side power supply node and its drain electrode connected to the bootstrap capacitor. While the LDMOS transistor is driven, the current conducted through a parasitic transistor is limited, since such conduction shunts current available for charging bootstrap capacitor C1. Furthermore, the back-gate of the '632 LDMOS transistor is clamped to a biasing voltage during normal operation to ensure a that a constant 4V gate-to-source voltage is required to turn on the LDMOS transistor.
Although conventional bootstrap diode emulators, such as the emulator described in the '632 patent, limit the current through the parasitic transistor, it is believed that such emulators disadvantageously permit at least some current to be shunted to ground by the parasitic transistor, thereby robbing the bootstrap capacitor of at least some of the current required for charging. In this manner, the bootstrap capacitor charges more slowly, making such conventional bootstrap diode emulators ineffective for certain applications, such as high frequency half-bridge driver applications.